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Please use this identifier to cite or link to this item: https://rinacional.tecnm.mx/jspui/handle/TecNM/2466
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dc.contributor.advisorLujan Ramirez, Carlos Alberto%296592-
dc.contributor.advisorGio Sandoval, Jesus%297308-
dc.contributor.authorRodriguez Salas, Rosemberg Oswaldo-
dc.creatorRodriguez Salas, Rosemberg Oswaldo%579951-
dc.date.accessioned2021-09-08T17:27:34Z-
dc.date.available2021-09-08T17:27:34Z-
dc.date.issued2016-12-15-
dc.identifier.urihttps://rinacional.tecnm.mx/jspui/handle/TecNM/2466-
dc.descriptionBeing similar to Photovoltaic panels, photovoltaic (PV) emulator systems make it possible to perform different PV system tests under various operating conditions. This work outlines a PV emulator design and implementation on a FPGA board. This architecture follows the piecewise polynomial approximation and parallel computing techniques, and shows its capability to generate high-accuracy I-V, P-Vcurves. The main contribution is the addition of hybrid segmentation that enhances speed and area of the implementation maintaining accuracy on the results.es_MX
dc.language.isospaes_MX
dc.publisherTecnológico Nacional de Méxicoes_MX
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0es_MX
dc.subjectinfo:eu-repo/classification/cti/7es_MX
dc.subject.otherpiecewise polynomial approximation, segmentation, PV emulator, systolic array network, FPGA.es_MX
dc.titleDiseño de un emulador Fotolovtaico basado en aproximaciones de polinomios con segmentación no uniforme.es_MX
dc.typeinfo:eu-repo/semantics/masterThesises_MX
dc.contributor.directorCastillo Atoche, Alejandro Arturo%98110-
dc.contributor.directorAtoche Ensenat, Jose Ramon%200715-
dc.folio0044es_MX
dc.rights.accessinfo:eu-repo/semantics/openAccesses_MX
dc.publisher.tecnmInstituto Tecnológico de Méridaes_MX
Appears in Collections:Maestría en Ingeniería

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